diff --git a/unoptimized_lr/simple_lr_stack.py b/unoptimized_lr/simple_lr_stack.py
index aaed13e6d04a0c48f479713d781e1d3e4fc4361e..4881347413a1e81e879a79ff361437c61bba68b8 100644
--- a/unoptimized_lr/simple_lr_stack.py
+++ b/unoptimized_lr/simple_lr_stack.py
@@ -77,8 +77,8 @@ class ParseStack(Elaboratable):
 
         # Data outputs
 #        self.out_data_port       = Signal(width) #data_out
-        self.out_aux_port        = Signal(range(depth)) # index_out
-        self.out_data_valid      = Signal(1) # merge these as valid_out
+        #self.out_aux_port        = Signal(range(depth)) # index_out
+        #self.out_data_valid      = Signal(1) # merge these as valid_out
         self.out_aux_valid       = Signal(1)#
 
 
@@ -153,7 +153,7 @@ class ParseStack(Elaboratable):
                         with m.Case(self.POP):
                             m.d.comb += rport.addr.eq(stack_pointer)
                             m.d.comb += self.bus.data_out.eq(rport.data)
-                            m.d.comb += self.out_data_valid.eq(1)
+                            m.d.comb += self.bus.valid_out.eq(1)
 
                             with m.If(stack_pointer == 0):
                                 m.next = "EMPTY"
@@ -178,18 +178,17 @@ class ParseStack(Elaboratable):
                             with m.Else():
                                 m.d.comb += rport.addr.eq(self.bus.index_in)
                                 m.d.comb += self.bus.data_out.eq(rport.data)
-                                m.d.comb += self.out_data_valid.eq(1)
+                                m.d.comb += self.bus.valid_out.eq(1)
                                 m.next = "AT_LEAST_ONE_ITEM"
 
                         with m.Case(self.READ_TOS):
-                            m.d.comb += self.out_data_valid.eq(1)
+                            m.d.comb += self.bus.valid_out.eq(1)
                             m.d.comb += rport.addr.eq(stack_pointer)
                             m.d.comb += self.bus.data_out.eq(rport.data)
-                            m.d.comb += self.out_data_valid.eq(1)
                             m.next = "AT_LEAST_ONE_ITEM"
 
                         with m.Case(self.READ_SP):
-                            m.d.comb += self.out_aux_port.eq(stack_pointer)
+                            m.d.comb += self.bus.index_out.eq(stack_pointer)
                             m.d.comb += self.out_aux_valid.eq(1)
                             m.next = "AT_LEAST_ONE_ITEM"