diff --git a/rtl_lib/arbitrary_width_memory.py b/rtl_lib/arbitrary_width_memory.py
index 001849ce51d43b66fe7dcc5f1808837fed8ec536..953a74b23a6bc95b4f9d9085e913eb867fcccb80 100644
--- a/rtl_lib/arbitrary_width_memory.py
+++ b/rtl_lib/arbitrary_width_memory.py
@@ -12,18 +12,9 @@ class ArbitraryWidthMemoryLayout(Layout):
         super().__init__([
             # DATA
             ("r_data",        unsigned(data_width)),      # OUTPUT
-            ("w_data",        unsigned(data_width)),      # INPUT
 
             # ADDRESS
             ("r_addr",        unsigned(address_width)),   # INPUT
-            ("w_addr",        unsigned(address_width)),   # INPUT
-
-
-            # CONTROL
-            ("fault",          1),
-
-            # MODE SELECT
-            ("write_enable",   1),                        # INPUT
 
             # FLOW CONTROL UPSTREAM
             ("valid_in",       1),                        # INPUT