From 86637eb66fc70b279c6f05684dca273d5b95ab75 Mon Sep 17 00:00:00 2001 From: Kia <kia@special-circumstanc.es> Date: Wed, 3 Mar 2021 19:54:51 -0700 Subject: [PATCH] reorder --- gearbox.py | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/gearbox.py b/gearbox.py index b190ca3..57b2271 100755 --- a/gearbox.py +++ b/gearbox.py @@ -113,9 +113,11 @@ class GearboxFlowControl(Elaboratable): m.d.comb += can_read_this_cycle.eq(0) m.d.comb += can_write_this_cycle.eq(0) m.d.sync += internalfault.eq(1) + with m.Case(IndexDisambiguator.LAST_OP_WAS_WRITE): # completely full m.d.comb += can_read_this_cycle.eq(1) m.d.comb += can_write_this_cycle.eq(0) + with m.Case(IndexDisambiguator.LAST_OP_WAS_READ): # completely empty m.d.comb += can_read_this_cycle.eq(0) m.d.comb += can_write_this_cycle.eq(1) @@ -125,19 +127,16 @@ class GearboxFlowControl(Elaboratable): # The valid bits are: inclusive [read_ptr, write_ptr) exclusive # the invalid bits are inclusive [write_ptr, K] inclusive, union with inclusive [0, read_ptr) exclusive - # We first calculate the number of valid bits: + # We first calculate the number of valid and invalid bits: numvalid = Signal(range(len_storage)) + numinvalid = Signal(range(len_storage)) m.d.comb += numvalid.eq(write_ptr - read_ptr) + m.d.comb += numinvalid.eq(len_storage - write_ptr + read_ptr) with m.If(numvalid >= self.out_width): m.d.comb += can_read_this_cycle.eq(1) - # We calculate the number of invalid bits: - numinvalid = Signal(range(len_storage)) - - m.d.comb += numinvalid.eq(len_storage - write_ptr + read_ptr) - with m.If(numinvalid >= self.in_width): m.d.comb += can_write_this_cycle.eq(1) @@ -146,21 +145,19 @@ class GearboxFlowControl(Elaboratable): # The valid bits are: inclusive [read_ptr, K] inclusive, union with inclusive [0, write_ptr) exclusive # the invalid bits are inclusive [write_ptr, read_ptr) exclusive - # We first calculate the number of valid bits: + # We first calculate the number of valid and invalid bits: numvalid = Signal(range(len_storage)) + numinvalid = Signal(range(len_storage)) m.d.comb += numvalid.eq(len_storage - read_ptr + write_ptr) + m.d.comb += numinvalid.eq(read_ptr - write_ptr) with m.If(numvalid >= self.out_width): m.d.comb += can_read_this_cycle.eq(1) - # We calculate the number of invalid bits: - numinvalid = Signal(range(len_storage)) - - m.d.comb += numinvalid.eq(read_ptr - write_ptr) - with m.If(numinvalid >= self.in_width): m.d.comb += can_write_this_cycle.eq(1) + with m.Else(): # should never happen m.d.sync += internalfault.eq(1) return m -- GitLab