diff --git a/rtl_lib/gearbox.py b/rtl_lib/gearbox.py
index a7811664e1cd5272ac22cf214761524d4a89b49b..313a8c81399ac4243afcdaf687426c52b36bdb94 100644
--- a/rtl_lib/gearbox.py
+++ b/rtl_lib/gearbox.py
@@ -220,11 +220,11 @@ class DummyPlug(Elaboratable):
     def elaborate(self, platform):
         m = Module()
 
-        upstream_width   = 64
-        downstream_width = 13
-        sim_memory_size = 512
+        upstream_width   = 3
+        downstream_width = 41
+        sim_memory_size = 256
 
-        expiration_date = int(sim_memory_size/upstream_width)-2
+        expiration_date = sim_memory_size - upstream_width*2
 
         wrapped = Signal(1)
 
@@ -246,8 +246,8 @@ class DummyPlug(Elaboratable):
         m.d.comb += upstream_transaction.eq(gearbox.bus.upstream_valid_in & gearbox.bus.upstream_ready_out)
         m.d.comb += downstream_transaction.eq(gearbox.bus.downstream_ready_in & gearbox.bus.downstream_valid_out)
 
-        upstream_bits = Signal(range(1024))
-        downstream_bits = Signal(range(1024))
+        upstream_bits = Signal(range(sim_memory_size))
+        downstream_bits = Signal(range(sim_memory_size))
 
 
         with m.If(upstream_bits > expiration_date):