Commits · 7bcd6406e8543a39417025e9a393501e37174318 · Kia / Hammer FPGA backend

Apr 03, 2021
- seems to work, i think we should write the shift register so we can do the... · 7bcd6406
  Kia authored 4 years ago
  7bcd6406
- we forgot to register the pseudoindex · b93901f3
  Kia authored 4 years ago
  
  b93901f3
- gitignore for sby work · fe2f2706
  Kia authored 4 years ago
  
  fe2f2706
- comment AW Memory · fb8dc942
  Kia authored 4 years ago
  
  fb8dc942
- first implementation of arbitrary width read-only memory · 425a195d
  Kia authored 4 years ago
  
  425a195d
- try gearbox formal with different values. · 77b3d958
  Kia authored 4 years ago
  
  77b3d958
- we can make this read-only because the only write that happens is for the... · 6e7ae7de
  Kia authored 4 years ago
  6e7ae7de
Mar 29, 2021
- remove superfluous yosys commands, prep does those for us already · 538a4de9
  Kia authored 4 years ago
  
  538a4de9
- fix txn vs bits bug in the expiration date calculation · 90a83448
  Kia authored 4 years ago
  
  90a83448
- make it work in general case with non-unitary bit widths. also k-induction... · 645fe132
  Kia authored 4 years ago
  645fe132
- remove superfluous asserts. at least i think they're superfluous, we still... · 24d6c807
  Kia authored 4 years ago
  24d6c807
- passes k-induction · 037e25fb
  Kia authored 4 years ago
  
  037e25fb
Mar 24, 2021
- try to find some better constraints · dc0ff4ef
  Kia authored 4 years ago
  
  dc0ff4ef
- edge case ferreted out! · cd09f49f
  Kia authored 4 years ago
  
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- BMC showed us a bug! · f0cefd43
  Kia authored 4 years ago
  
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- rename and start BMC · 1fc55a34
  Kia authored 4 years ago
  
  1fc55a34
- the gearbox is a lot easier to write if we write it as a shift register rather than memory. · 7f296bfd
  Kia authored 4 years ago
  
  7f296bfd
- change parameters around a bit · bf56d41e
  Kia authored 4 years ago
  
  bf56d41e
Mar 15, 2021
- start work on golden model · 82537ca0
  Kia authored 4 years ago
  
  82537ca0
- hide the Asserts/Assume/Covers behind an if so the nmigen sim can deal · 41845cda
  Kia authored 4 years ago
  41845cda
- reordering · 5382fdd6
  Kia authored 4 years ago
  
  5382fdd6
- mv · 9d0c75bb
  Kia authored 4 years ago
  
  9d0c75bb
- pipe_stage formal properties · bee0c076
  Kia authored 4 years ago
  
  bee0c076
- reorganize everything · 57a92a61
  Kia authored 4 years ago
  
  57a92a61
Mar 14, 2021
- using abc-pdr makes the proof hold · 5e7f0a12
  Kia authored 4 years ago
  
  5e7f0a12
- rename · e8289583
  Kia authored 4 years ago
  
  e8289583
- still not getting this formal proof working :\ · c47c48f7
  Kia authored 4 years ago
  
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- almost works · 3fbae984
  Kia authored 4 years ago
  
  3fbae984
- successfully proved! · 2004bd39
  Kia authored 4 years ago
  
  2004bd39
- attempted to verify equivalence, but apparently they are subtly · 0e119d22
  Kia authored 4 years ago
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- generic pipeline stage register, with registered and non-registered · f901ac14
  Kia authored 4 years ago
  f901ac14
Mar 13, 2021
- working on reduce rule lookup thingie · 3dab4e93
  Kia authored 4 years ago
  
  3dab4e93
- add lang_params · c2c009e7
  Kia authored 4 years ago
  
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- documented interfaces · 31374cfc
  Kia authored 4 years ago
  
  31374cfc
- arbitrary_width_memory.py · c3e23895
  Kia authored 4 years ago
  
  c3e23895
Mar 12, 2021
- start arbitrary width memory HDL · 7851b840
  Kia authored 4 years ago
  
  7851b840
- simulation for indices/edgecases seems to work · 5ddd4b18
  Kia authored 4 years ago
  
  5ddd4b18
Mar 10, 2021
- unoptimized_lr/skidbuffer.py · 2e6d559d
  Kia authored 4 years ago
  
  2e6d559d
- width_converter_simulator.py · b5031fe8
  Kia authored 4 years ago
  
  b5031fe8
- unoptimized_lr/simple_lr_automaton.py · a03532cc
  Kia authored 4 years ago
  
  a03532cc