Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
H
Hammer FPGA backend
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Automate
Agent sessions
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Container registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
GitLab community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Kia
Hammer FPGA backend
Commits
Commits · bb29b924537a6859240ed25e33a819b7cb7f958d
bb29b924537a6859240ed25e33a819b7cb7f958d
Select Git revision
1 result
Searching
hammer-fpga-backend
Author
Search by author
Any Author
authors
0 authors
Browse files
Apr 10, 2021
attempt to fix the desync bug
· bb29b924
Kia
authored
Apr 10, 2021
bb29b924
Apr 06, 2021
test using the internal nMigen "Part" function from nmigen.hdl.ast to see if...
· 8830f9e2
Kia
authored
Apr 6, 2021
8830f9e2
restore omitted line, use the refolder to initialize the memory
· bada5a35
Kia
authored
Apr 6, 2021
bada5a35
refolder works
· 11102625
Kia
authored
Apr 6, 2021
11102625
make note of added dependency
· 711781c4
Kia
authored
Apr 6, 2021
711781c4
work on bit resizer (also will be useful for initializing the memory for the formal/BMC test)
· 65d16f0e
Kia
authored
Apr 6, 2021
65d16f0e
take care of nonzero least-significant bit index
· 6db9cb8c
Kia
authored
Apr 6, 2021
6db9cb8c
think there's something wrong with this but committing anyway to get it down
· 05b3f174
Kia
authored
Apr 6, 2021
05b3f174
Apr 05, 2021
rm now-superfluous comments
· ece3d518
Kia
authored
Apr 5, 2021
ece3d518
right/left terminology removed
· a752a057
Kia
authored
Apr 5, 2021
a752a057
split the bitwise calculation in two steps
· f150d22e
Kia
authored
Apr 5, 2021
f150d22e
rename the confusing "left" and "right" bit index stuff, pt 2
· cc974b1a
Kia
authored
Apr 5, 2021
cc974b1a
rename the confusing "left" and "right" bit index stuff, pt 1
· b0079683
Kia
authored
Apr 5, 2021
b0079683
this is the best way to do a synthesizable cutting-off of the top K bits, i believe.
· 58fe2311
Kia
authored
Apr 5, 2021
58fe2311
try working on combining shift register, we morally are on the right track but...
· bb6141f3
Kia
authored
Apr 5, 2021
bb6141f3
Apr 03, 2021
seems to work, i think we should write the shift register so we can do the...
· 7bcd6406
Kia
authored
Apr 3, 2021
7bcd6406
we forgot to register the pseudoindex
· b93901f3
Kia
authored
Apr 3, 2021
b93901f3
gitignore for sby work
· fe2f2706
Kia
authored
Apr 3, 2021
fe2f2706
comment AW Memory
· fb8dc942
Kia
authored
Apr 3, 2021
fb8dc942
first implementation of arbitrary width read-only memory
· 425a195d
Kia
authored
Apr 3, 2021
425a195d
try gearbox formal with different values.
· 77b3d958
Kia
authored
Apr 3, 2021
77b3d958
we can make this read-only because the only write that happens is for the...
· 6e7ae7de
Kia
authored
Apr 3, 2021
6e7ae7de
Mar 29, 2021
remove superfluous yosys commands, prep does those for us already
· 538a4de9
Kia
authored
Mar 29, 2021
538a4de9
fix txn vs bits bug in the expiration date calculation
· 90a83448
Kia
authored
Mar 29, 2021
90a83448
make it work in general case with non-unitary bit widths. also k-induction...
· 645fe132
Kia
authored
Mar 29, 2021
645fe132
remove superfluous asserts. at least i think they're superfluous, we still...
· 24d6c807
Kia
authored
Mar 29, 2021
24d6c807
passes k-induction
· 037e25fb
Kia
authored
Mar 29, 2021
037e25fb
Mar 24, 2021
try to find some better constraints
· dc0ff4ef
Kia
authored
Mar 24, 2021
dc0ff4ef
edge case ferreted out!
· cd09f49f
Kia
authored
Mar 24, 2021
cd09f49f
BMC showed us a bug!
· f0cefd43
Kia
authored
Mar 24, 2021
f0cefd43
rename and start BMC
· 1fc55a34
Kia
authored
Mar 24, 2021
1fc55a34
the gearbox is a lot easier to write if we write it as a shift register rather than memory.
· 7f296bfd
Kia
authored
Mar 24, 2021
7f296bfd
change parameters around a bit
· bf56d41e
Kia
authored
Mar 24, 2021
bf56d41e
Mar 15, 2021
start work on golden model
· 82537ca0
Kia
authored
Mar 15, 2021
82537ca0
hide the Asserts/Assume/Covers behind an if so the nmigen sim can deal
· 41845cda
Kia
authored
Mar 15, 2021
41845cda
reordering
· 5382fdd6
Kia
authored
Mar 15, 2021
5382fdd6
mv
· 9d0c75bb
Kia
authored
Mar 15, 2021
9d0c75bb
pipe_stage formal properties
· bee0c076
Kia
authored
Mar 15, 2021
bee0c076
reorganize everything
· 57a92a61
Kia
authored
Mar 15, 2021
57a92a61
Mar 14, 2021
using abc-pdr makes the proof hold
· 5e7f0a12
Kia
authored
Mar 14, 2021
5e7f0a12
Loading